CVE-2026-53051

Technical Description

In the Linux kernel, the following vulnerability has been resolved:

PCI: tegra194: Fix CBB timeout caused by DBI access before core power-on

When PERST# is deasserted twice (assert -> deassert -> assert -> deassert),

a CBB (Control Backbone) timeout occurs at DBI register offset 0x8bc

(PCIE_MISC_CONTROL_1_OFF). This happens because pci_epc_deinit_notify()

and dw_pcie_ep_cleanup() are called before reset_control_deassert() powers

on the controller core.

The call chain that causes the timeout:

pex_ep_event_pex_rst_deassert()

pci_epc_deinit_notify()

pci_epf_test_epc_deinit()

pci_epf_test_clear_bar()

pci_epc_clear_bar()

dw_pcie_ep_clear_bar()

__dw_pcie_ep_reset_bar()

dw_pcie_dbi_ro_wr_en() <- Accesses 0x8bc DBI register

reset_control_deassert(pcie->core_rst) <- Core powered on HERE

The DBI registers, including PCIE_MISC_CONTROL_1_OFF (0x8bc), are only

accessible after the controller core is powered on vi

Remediation

Check the references section for vendor advisories and patches from linux. Update linux_kernel to the latest patched version. If immediate patching is not possible, review the CVSS vector to understand the attack surface and apply compensating controls such as network segmentation or access restrictions.

Affected Products

References