CVE-2026-97620

/// Technical description

In the Linux kernel, the following vulnerability has been resolved:

drm/xe: Flush LSC untyped L1 dataport cache after rcs/ccs batches

emit_render_cache_flush() sets PIPE_CONTROL0_HDC_PIPELINE_FLUSH to

flush the L2/HDC data cache before fence signalling, but it never

requests a flush of the LSC untyped L1 data cache via the 'Untyped

Data-Port Cache Flush Enable' bit in PIPE_CONTROL DWord0[11].

Per the Bspec, in 3D pipeline mode HDC Pipeline Flush is documented to

also flush/invalidate the untyped L1 cache, but only depending on how

HDC_CHICKEN0[13:11] is programmed. Starting with MTL, this coupling

between HDC Pipeline Flush and the untyped L1 cache flush no longer

holds in practice, regardless of how HDC_CHICKEN0 is programmed, so

relying on it is not safe on newer platforms such as BMG. Mesa's Vulkan

driver (anv) has been assuming the kernel flushes both caches between

submissions, and hit user-visible corruption in apps such as Llama.cpp

because of this gap; it now works around it

/// Remediation

Check the references section for vendor advisories, patches, and mitigation guidance. If immediate patching is not possible, review the CVSS vector to understand the attack surface and apply compensating controls such as network segmentation or access restrictions.

/// References